ES3B2 Digital Systems Design

Module Leader: Dr M. Cole

Co-lecturer: Dr S.T. Davies

Module Information

Scope

This 15 CATS module is one of the third year modules for:

Core:	Optional:
Computer and Information Engineering Electronic Engineering	Engineering

Aims

There have been great advances in semiconductor technology during the last ten years or so. This has led to chips with increased area as well as increased gate density. This module aims to present modern approaches to the design of digital circuits in the VLSI era, particularly the use of hardware description languages such as VHDL.

Learning Outcomes

By the end of the module the student should be able to...

Understand the principles of designing digital logic circuits.
Understand the principles of hardware description languages in particular VHDL in relation to the design of digital systems.
Understand the principles of control unit design and design controllers from written specifications.
Understand the principles of designing with microcontrollers and controlling/programing microcontroller systems.
Understand the principles of testing digital circuits and setup test patterns for specific circuits.
Use CAD tools
Make decisions about specific designs, taking account of constraints such as speed, power, size, etc.
Interpret simulation results
Write VHDL hierarchical code for digital systems of a reasonable complexity, compile and simulate the code.

Syllabus

Overview including review of 2nd year work. Systematic design of Combinational and Sequential Logic Circuits.

VHDL: Background. A simple example. VHDL structure – entity and architecture. Signal declarations. Assignments. Heirarchical design. Dealing with sequential circuits. Simulation.

Digital System Design: System models. Datapath and controller partitioning. ASM Charts. Logic Synthesis. Microprogrammable systems. PLDs and Microcontrollers.

Testing Digital Systems: Need for testing. Fault models. Fault simulation. Examples. Automatic test pattern generation. Testing circuits with PLDs and Micros.

Design for Testability: Some basic rules for enhancing testability. PLDs and Micros. Structured design. Scan-in scan-out technique. Self-testing circuits. Boundary scan.

Design of Asynchronous Sequential Logic Circuits.

Logic synthesis. Design approaches for programmable logic.