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People - Dr Sarayut Amornwongpeeti

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Dr Sarayut Amornwongpeeti

Research Fellow

Email: s.amornwongpeeti@warwick.ac.uk

University of Warwick
School of Engineering
Coventry
CV4 7AL
United Kingdom
 

Biography

Dr Sarayut Amornwongpeeti joined the Power and Control Systems Laboratory in the School of Engineering at the University of Warwick as a Research Fellow in November 2015. He received his B.Eng. degree (First Class Honours) in Electrical Engineering from the King Mongkut’s Institute of Technology Ladkrabang, Thailand, and his M.Eng. degree in Microelectronics from the Asian Institute of Technology, Thailand, in 2007 and 2010, respectively. From 2007 to 2008, he was an Electrical Engineer at Thai Oil Public Company Limited. He completed his D.Eng. degree in Microelectronics and Embedded Systems from the Asian Institute of Technology in 2015. During 2010 to 2012, he was a PhD research student at the Department of Industrial Electronics, University of Minho, Portugal, under the scholarship of Erasmus Mundus EM EuroAsia Program. In 2014, he was a research student at the National Institute of Informatics, Tokyo, Japan. His research interest includes FPGA-based motor control and drive systems. He is currently working on the Innovate UK project of “Adaptive Electric Drive Controller”, joined between the University of Warwick and the AVL Powertrain UK Ltd.

Research Interests

  • FPGA-based motor control and drive systems

Recent Publications

Peer-reviewed Journal Articles
  1. S. Amornwongpeeti, M. Ekpanyapong, N. Chayopitak, J. L. Monteiro, J. S. Martins, and J. L. Afonso, “A Single Chip FPGA- Based Solution for Controlling of Multi-Unit PMSM Motor with Time-Division Multiplexing Scheme,” Microprocessors and Microsystems, vol.39, no.8, pp.621-633, Nov. 2015.
  2. S. Amornwongpeeti, M. Ekpanyapong, N. Chayopitak, J. L. Monteiro, J. S. Martins, and J. L. Afonso, “A Single Chip FPGA- Based Cross-Coupling Multi-Motor Drive System,” IEICE Electronics Express, vol.12, no.13, pp.1-9, Jul. 2015.
  3. S. Amornwongpeeti, M. Ekpanyapong, and C. Punyasai, “Exploring of Third-Order Cascaded Multi-bit Delta-Sigma Modulator with Interstage Feedback Paths,” ECTI Transactions on Electrical Eng., Electronics, and Communications, vol.9, no.1, pp.92-101, Feb. 2011.
Conference Papers:
  1. S. Amornwongpeeti, S. Kreuawan, N. Chayopitak, S. Kachapornkul, and M. Ekpanyapong, “A Study of Dynamic Torque Ripples Using an Integrated Simulation Model of Brushless DC Motor and Drive Systems,” in Proc. of the IEEE International Conference on ICEMS, Nov. 2015 - Accepted
  2. S. Amornwongpeeti, N. Ono, and M. Ekpanyapong, “Design of FPGA-Based Rapid Prototype Spectral Subtraction for Hands-free Speech Applications,” in Proc. of the Annual Summit and Conference on APSIPA, pp. 1-6, Dec. 2014.
  3. S. Amornwongpeeti, M. Ekpanyapong, and C. Punyasai, “A Study of Non-ideality Effects of Third-order Cascaded Multi-Bit Delta-Sigma Modulator with Interstage Feedback Paths,” in Proc. of the International Conference on ITC-CSCC, Jul. 2010.
  4. S. Amornwongpeeti, M. Ekpanyapong, and C. Punyasai, “A Comparative Analysis of Behavioral Simulation for Third-Order Cascaded Multi-Bit Delta-Sigma Modulator with Interstage Feedback Paths,” in Proc. of the International Conference on ECTI-CON, pp. 371-375, May 2010.